A Low Temperature Fully Lithographic Process For Metal–Oxide Field-Effect Transistors
نویسندگان
چکیده
We report a low temperature C lithographic method for fabricating hybrid metal oxide/organic field-effect transistors (FETs) that combine a zinc–indium–oxide (ZIO) semiconductor channel and organic, parylene, dielectric layer. The transistors show a field-effect mobility of 12 0.8 cm V s , on/off ratio of 10 and turn-off voltage of V. This work demonstrates that organic and inorganic layers can be deposited and patterned using a low temperature budget, integrated lithographic process to make FETs suitable for large area electronic applications.
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